* Unisoc Universal Flash Storage (UFS) Host Controller

UFSHC nodes are defined to describe on-chip UFS host controllers.
Each UFS controller instance should have its own node.

Required properties:
- compatible        : must contain "sprd,ufshc"
- interrupts        : <interrupt mapping for UFS host controller IRQ>
- reg               : <registers mapping>

Optional properties:
- phys                  : phandle to UFS PHY node
- phy-names             : the string "ufsphy" when is found in a node, along
                          with "phys" attribute, provides phandle to UFS PHY
 			  node
- vdd-hba-supply        : phandle to UFS host controller supply regulator node
- vcc-supply            : phandle to VCC supply regulator node
- vccq-supply           : phandle to VCCQ supply regulator node
- vccq2-supply          : phandle to VCCQ2 supply regulator node
- vcc-supply-1p8        : For embedded UFS devices, valid VCC range is 1.7-1.95V
                          or 2.7-3.6V. This boolean property when set, specifies
			  to use low voltage range of 1.7-1.95V. Note for
			  external UFS cards this property is invalid and valid
			  VCC range is always 2.7-3.6V.
- vcc-max-microamp      : specifies max. load that can be drawn from vcc supply
- vccq-max-microamp     : specifies max. load that can be drawn from vccq supply
- vccq2-max-microamp    : specifies max. load that can be drawn from vccq2
			  supply
- <name>-fixed-regulator : boolean property specifying that <name>-supply is a
			  fixed regulator

- clocks                : List of phandle and clock specifier pairs
- clock-names           : List of clock input name strings sorted in the same
                          order as the clocks property.
- freq-table-hz		: Array of <min max> operating frequencies stored in the
			  same order as the clocks property. If this property is
			  not defined or a value in the array is "0" then it is
			  assumed that the frequency is set by the parent clock
			  or a fixed rate clock source.
-lanes-per-direction	: number of lanes available per direction - either 1 or
			  2. Note that it is assume same number of lanes is used
			  both directions at once. If not specified, default is
			  2 lanes per direction.

Note: If above properties are not defined it can be assumed that the supply
regulators or clocks are always on.

Example:
	ufs: ufs@71900000 {
		compatible  = "sprd,ufshc";
		vcc-supply = <&vddemmccore>;
		reg = <0 0x71900000 0 0x10000>;
		reg-names = "ufshci_reg";
		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
	};

